From a35d93e0c3b619272727db1bbc498bc7231b38d9 Mon Sep 17 00:00:00 2001 From: Dave Hansen Date: Tue, 22 Sep 2026 20:23:11 -0700 Subject: [PATCH 01/75] x86/platform/uv: Remove the unused UV irq_domain uv_irq.c implements a small irq_domain that sits on top of the x86 vector domain and, on allocation, programs a UV hub MMR so that the hub sends an MSI to a chosen CPU. It has exactly two entry points, uv_setup_irq() and uv_teardown_irq(), and both were built for the SGI XPC/XPNET and GRU drivers. Those drivers are gone: commit dbf69afe320e ("misc: sgi-xp: Remove SGI XP drivers") commit 85de4712bccf ("misc: sgi-gru: Remove SGI GRU driver") Nothing in the tree has called uv_setup_irq() or uv_teardown_irq() since, so the whole file is dead code: the irq_chip, the domain ops, the lazily-created domain and the MMR programming helper are all only reachable through those two functions. Delete uv_irq.c and , and with them the last users of the X86_IRQ_ALLOC_TYPE_UV allocation type and of struct uv_alloc_info. That leaves struct irq_alloc_info's union with a single member, so fold it into a plain struct member; the access syntax at the remaining ioapic users does not change. No functional change intended. --- arch/x86/include/asm/hw_irq.h | 15 +-- arch/x86/include/asm/uv/uv_irq.h | 37 ------ arch/x86/platform/uv/Makefile | 2 +- arch/x86/platform/uv/uv_irq.c | 210 ------------------------------- 4 files changed, 2 insertions(+), 262 deletions(-) delete mode 100644 arch/x86/include/asm/uv/uv_irq.h delete mode 100644 arch/x86/platform/uv/uv_irq.c diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h index 47727d0b540b9..682bf5e99a473 100644 --- a/arch/x86/include/asm/hw_irq.h +++ b/arch/x86/include/asm/hw_irq.h @@ -38,7 +38,6 @@ enum irq_alloc_type { X86_IRQ_ALLOC_TYPE_PCI_MSIX, X86_IRQ_ALLOC_TYPE_DMAR, X86_IRQ_ALLOC_TYPE_AMDVI, - X86_IRQ_ALLOC_TYPE_UV, }; struct ioapic_alloc_info { @@ -49,14 +48,6 @@ struct ioapic_alloc_info { u32 valid : 1; }; -struct uv_alloc_info { - int limit; - int blade; - unsigned long offset; - char *name; - -}; - /** * irq_alloc_info - X86 specific interrupt allocation info * @type: X86 specific allocation type @@ -68,7 +59,6 @@ struct uv_alloc_info { * @data: Allocation specific data * * @ioapic: IOAPIC specific allocation data - * @uv: UV specific allocation data */ struct irq_alloc_info { enum irq_alloc_type type; @@ -79,10 +69,7 @@ struct irq_alloc_info { struct msi_desc *desc; void *data; - union { - struct ioapic_alloc_info ioapic; - struct uv_alloc_info uv; - }; + struct ioapic_alloc_info ioapic; }; struct irq_cfg { diff --git a/arch/x86/include/asm/uv/uv_irq.h b/arch/x86/include/asm/uv/uv_irq.h deleted file mode 100644 index 1876b5edd1426..0000000000000 --- a/arch/x86/include/asm/uv/uv_irq.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * SGI UV IRQ definitions - * - * Copyright (C) 2008 Silicon Graphics, Inc. All rights reserved. - */ - -#ifndef _ASM_X86_UV_UV_IRQ_H -#define _ASM_X86_UV_UV_IRQ_H - -/* If a generic version of this structure gets defined, eliminate this one. */ -struct uv_IO_APIC_route_entry { - __u64 vector : 8, - delivery_mode : 3, - dest_mode : 1, - delivery_status : 1, - polarity : 1, - __reserved_1 : 1, - trigger : 1, - mask : 1, - __reserved_2 : 15, - dest : 32; -}; - -enum { - UV_AFFINITY_ALL, - UV_AFFINITY_NODE, - UV_AFFINITY_CPU -}; - -extern int uv_setup_irq(char *, int, int, unsigned long, int); -extern void uv_teardown_irq(unsigned int); - -#endif /* _ASM_X86_UV_UV_IRQ_H */ diff --git a/arch/x86/platform/uv/Makefile b/arch/x86/platform/uv/Makefile index 1441dda8edf76..9a52605296f3d 100644 --- a/arch/x86/platform/uv/Makefile +++ b/arch/x86/platform/uv/Makefile @@ -1,2 +1,2 @@ # SPDX-License-Identifier: GPL-2.0-only -obj-$(CONFIG_X86_UV) += bios_uv.o uv_irq.o uv_time.o uv_nmi.o +obj-$(CONFIG_X86_UV) += bios_uv.o uv_time.o uv_nmi.o diff --git a/arch/x86/platform/uv/uv_irq.c b/arch/x86/platform/uv/uv_irq.c deleted file mode 100644 index 9bcfb00fcf550..0000000000000 --- a/arch/x86/platform/uv/uv_irq.c +++ /dev/null @@ -1,210 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * SGI UV IRQ functions - * - * Copyright (C) 2008 Silicon Graphics, Inc. All rights reserved. - */ - -#include -#include -#include - -#include -#include -#include -#include - -/* MMR offset and pnode of hub sourcing interrupts for a given irq */ -struct uv_irq_2_mmr_pnode { - unsigned long offset; - int pnode; -}; - -static void uv_program_mmr(struct irq_cfg *cfg, struct uv_irq_2_mmr_pnode *info) -{ - unsigned long mmr_value; - struct uv_IO_APIC_route_entry *entry; - - BUILD_BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != - sizeof(unsigned long)); - - mmr_value = 0; - entry = (struct uv_IO_APIC_route_entry *)&mmr_value; - entry->vector = cfg->vector; - entry->delivery_mode = APIC_DELIVERY_MODE_FIXED; - entry->dest_mode = apic->dest_mode_logical; - entry->polarity = 0; - entry->trigger = 0; - entry->mask = 0; - entry->dest = cfg->dest_apicid; - - uv_write_global_mmr64(info->pnode, info->offset, mmr_value); -} - -static void uv_noop(struct irq_data *data) { } - -static int -uv_set_irq_affinity(struct irq_data *data, const struct cpumask *mask, - bool force) -{ - struct irq_data *parent = data->parent_data; - struct irq_cfg *cfg = irqd_cfg(data); - int ret; - - ret = parent->chip->irq_set_affinity(parent, mask, force); - if (ret >= 0) { - uv_program_mmr(cfg, data->chip_data); - vector_schedule_cleanup(cfg); - } - - return ret; -} - -static struct irq_chip uv_irq_chip = { - .name = "UV-CORE", - .irq_mask = uv_noop, - .irq_unmask = uv_noop, - .irq_eoi = apic_ack_irq, - .irq_set_affinity = uv_set_irq_affinity, -}; - -static int uv_domain_alloc(struct irq_domain *domain, unsigned int virq, - unsigned int nr_irqs, void *arg) -{ - struct uv_irq_2_mmr_pnode *chip_data; - struct irq_alloc_info *info = arg; - struct irq_data *irq_data = irq_domain_get_irq_data(domain, virq); - int ret; - - if (nr_irqs > 1 || !info || info->type != X86_IRQ_ALLOC_TYPE_UV) - return -EINVAL; - - chip_data = kmalloc_node(sizeof(*chip_data), GFP_KERNEL, - irq_data_get_node(irq_data)); - if (!chip_data) - return -ENOMEM; - - ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg); - if (ret >= 0) { - if (info->uv.limit == UV_AFFINITY_CPU) - irq_set_status_flags(virq, IRQ_NO_BALANCING); - - chip_data->pnode = uv_blade_to_pnode(info->uv.blade); - chip_data->offset = info->uv.offset; - irq_domain_set_info(domain, virq, virq, &uv_irq_chip, chip_data, - handle_percpu_irq, NULL, info->uv.name); - } else { - kfree(chip_data); - } - - return ret; -} - -static void uv_domain_free(struct irq_domain *domain, unsigned int virq, - unsigned int nr_irqs) -{ - struct irq_data *irq_data = irq_domain_get_irq_data(domain, virq); - - BUG_ON(nr_irqs != 1); - kfree(irq_data->chip_data); - irq_clear_status_flags(virq, IRQ_NO_BALANCING); - irq_domain_free_irqs_top(domain, virq, nr_irqs); -} - -/* - * Re-target the irq to the specified CPU and enable the specified MMR located - * on the specified blade to allow the sending of MSIs to the specified CPU. - */ -static int uv_domain_activate(struct irq_domain *domain, - struct irq_data *irq_data, bool reserve) -{ - uv_program_mmr(irqd_cfg(irq_data), irq_data->chip_data); - return 0; -} - -/* - * Disable the specified MMR located on the specified blade so that MSIs are - * longer allowed to be sent. - */ -static void uv_domain_deactivate(struct irq_domain *domain, - struct irq_data *irq_data) -{ - unsigned long mmr_value; - struct uv_IO_APIC_route_entry *entry; - - mmr_value = 0; - entry = (struct uv_IO_APIC_route_entry *)&mmr_value; - entry->mask = 1; - uv_program_mmr(irqd_cfg(irq_data), irq_data->chip_data); -} - -static const struct irq_domain_ops uv_domain_ops = { - .alloc = uv_domain_alloc, - .free = uv_domain_free, - .activate = uv_domain_activate, - .deactivate = uv_domain_deactivate, -}; - -static struct irq_domain *uv_get_irq_domain(void) -{ - static struct irq_domain *uv_domain; - static DEFINE_MUTEX(uv_lock); - struct fwnode_handle *fn; - - mutex_lock(&uv_lock); - if (uv_domain) - goto out; - - fn = irq_domain_alloc_named_fwnode("UV-CORE"); - if (!fn) - goto out; - - uv_domain = irq_domain_create_hierarchy(x86_vector_domain, 0, 0, fn, - &uv_domain_ops, NULL); - if (!uv_domain) - irq_domain_free_fwnode(fn); -out: - mutex_unlock(&uv_lock); - - return uv_domain; -} - -/* - * Set up a mapping of an available irq and vector, and enable the specified - * MMR that defines the MSI that is to be sent to the specified CPU when an - * interrupt is raised. - */ -int uv_setup_irq(char *irq_name, int cpu, int mmr_blade, - unsigned long mmr_offset, int limit) -{ - struct irq_alloc_info info; - struct irq_domain *domain = uv_get_irq_domain(); - - if (!domain) - return -ENOMEM; - - init_irq_alloc_info(&info, cpumask_of(cpu)); - info.type = X86_IRQ_ALLOC_TYPE_UV; - info.uv.limit = limit; - info.uv.blade = mmr_blade; - info.uv.offset = mmr_offset; - info.uv.name = irq_name; - - return irq_domain_alloc_irqs(domain, 1, - uv_blade_to_memory_nid(mmr_blade), &info); -} - -/* - * Tear down a mapping of an irq and vector, and disable the specified MMR that - * defined the MSI that was to be sent to the specified CPU when an interrupt - * was raised. - * - * Set mmr_blade and mmr_offset to what was passed in on uv_setup_irq(). - */ -void uv_teardown_irq(unsigned int irq) -{ - irq_domain_free_irqs(irq, 1); -} -- 2.43.0